TMS320C6211BGFN150

Product Summary

The TMS320C6211BGFN150 DSPs (including the TMS320C6211/C6211B devices) compose one of the fixed-point DSP families in the TMS320C6000 DSP platform. The TMS320C6211BGFN150 device is based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications. With performance of up to 1333 million instructions per second (MIPS) at a clock rate of 167 MHz, the TMS320C6211BGFN150 device offers cost-effective solutions to high-performance DSP programming challenges. The TMS320C6211BGFN150 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide six arithmetic logic units (ALUs) for a high degree of parallelism and two 16-bit multipliers for a 32-bit result. The TMS320C6211BGFN150 can produce two multiply-accumulates (MACs) per cycle for a total of 333 million MACs per second (MMACS). The TMS320C6211BGFN150 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.

Parametrics

Absolute maximum ratings: (1)Supply voltage range, CVDD: -0.3V to 2.3V; (2)Supply voltage range, DVDD: -0.3V to 4V; (3)Input voltage range: -0.3V to 4 V; (4)Output voltage range: -0.3 V to 4 V; (5)Operating case temperature ranges, TC(default): 0℃ to 90℃; (6)Storage temperature range, Tstg: -65℃to 150℃.

Features

Features: (1)Excellent Price/Performance Digital Signal Processors (DSPs): TMS320C62x (TMS320C6211 and TMS320C6211B); (2)32-Bit External Memory Interface (EMIF); (3)16-Bit Host-Port Interface (HPI); (4)Two Multichannel Buffered Serial Ports (McBSPs); (5)Two 32-Bit General-Purpose Timers; (6)Flexible Phase-Locked-Loop (PLL) Clock Generator; (7)IEEE-1149.1 (JTAG?) Boundary-Scan-Compatible; (8)256-Pin Ball Grid Array (BGA) Package (GFN and ZFN Suffixes); (9)0.18-μm/5-Level Metal Process CMOS Technology; (10)3.3-V I/Os, 1.8-V Internal.

Diagrams